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A 16-channel Silicon Strips Readout Chip in 180nm CMOS technology

Abstract : A highly integrated readout scheme for Silicon trackers making use of Deep Sub-Micron CMOS electronics (DSM) and analog sampling techniques is presented. In the context of the International Linear Collider (ILC) tracking detectors developments, a 16-channel readout chip for Silicon strips detector has been designed in 180nm CMOS technology, each channel comprising a low noise amplifier, a pulse shaper, a sample and hold and a comparator operated at low power. Test results are presented.
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Contributor : Dominique Girod <>
Submitted on : Thursday, January 18, 2007 - 2:27:57 PM
Last modification on : Thursday, December 10, 2020 - 10:50:52 AM
Long-term archiving on: : Tuesday, April 6, 2010 - 10:14:45 PM


  • HAL Id : in2p3-00125225, version 1


M. Dhellot, J.-F. Genat, H. Lebbolo, T.-H. Pham, A. Savoy-Navarro. A 16-channel Silicon Strips Readout Chip in 180nm CMOS technology. 2005 International Linear Collider Physics and Detector Workshop and Second ILC Accelerator Workshop, Aug 2005, Snowmass, United States. pp.ALCPG1321. ⟨in2p3-00125225⟩



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