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Study for the LHCb readout board

Abstract : The LHCb experiment envisages to upgrade its readout speed from 1 MHz to 40 MHz. The consequence for the electronics is higher densities and an increase of serial links speed. Moreover the architecture must be reviewed to cope with links carrying data, clock and slow control at the same time. Relying on boards compliant with the xTCA standard, we demonstrate how it is possible to build a flexible, scalable system consistent with the requirements. Measurements related to signal integrity, clock distribution and performance of the supervision system are also presented.
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Contributor : Danielle Cristofol <>
Submitted on : Wednesday, May 25, 2011 - 8:34:52 AM
Last modification on : Wednesday, February 12, 2020 - 9:48:08 AM

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J.-P. Cachemiche, P.-Y. Duval, F. Hachon, R. Le Gac, F. Marin. Study for the LHCb readout board. TWEPP 2010 Topical Workshop on Electronics for Particle Physics, Sep 2010, Aachen, Germany. pp.C12036, ⟨10.1088/1748-0221/5/12/C12036⟩. ⟨in2p3-00595199⟩

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