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65nm technology for HEP: status et perspective

Abstract : The development of new experiments such as CLIC and the the foreseen Phase 2 pixel upgrades of ATLAS and CMS have very challenging requirements for the design of hybrid pixel readout chips, both in terms of performances and reliability. To face these challenges, the use of a more downscaled CMOS technology compared to previous projects is necessary. The CERN RD53 collaboration is undertaking a R&D programme to evaluate the use of a commercial 65 nm technology and to develop tools and frameworks which will help to design future pixel detectors. This paper gives a short overview of the RD53 collaboration activities and describes some examples of recent developments.
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Contributor : Emmanuelle Vernay Connect in order to contact the contributor
Submitted on : Thursday, September 17, 2015 - 10:45:15 AM
Last modification on : Tuesday, October 19, 2021 - 10:50:50 PM


  • HAL Id : in2p3-01200774, version 1



P. Valerio, M.B. Barbero, D. Fougeron, F. Gensolen, S. Godiot, et al.. 65nm technology for HEP: status et perspective. 23rd International Workshop on Vertex Detectors (VERTEX 2014), Sep 2014, Doksy, Czech Republic. pp.043. ⟨in2p3-01200774⟩



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