Design of low power 12bit 40MSPS SAR ADCs with a redundancy algorithm and digital calibration for high dynamic range calorimeter readout

M. Zeloufi; D. Dzahini; F. Rarbi; L. Gallin-Martel; J. Bouvier

Design of low power 12bit 40MSPS SAR ADCs with a redundancy algorithm and digital calibration for high dynamic range calorimeter readout

M. Zeloufi ¹ D. Dzahini ¹ F. Rarbi ¹ L. Gallin-Martel ¹ J. Bouvier ¹

1 LPSC - Laboratoire de Physique Subatomique et de Cosmologie

Abstract : We present two SAR ADCs using a generalized redundant search algorithm and offering the flexibility to relax the requirements on the DAC settling time. Two more bits of redundancy allow also a digital calibration, based on a code density analysis to compensate the capacitors mismatching effects. A monotonic switching algorithm is used for these prototypes saving about 70% of dynamic power consumption compared to conventional switching algorithm. A fully differential was used for both prototypes featuring 12bit 40MS/s in a CMOS 130nm 1P8M process

Document type :

Poster communications

Domain :

Engineering Sciences [physics] / Micro and nanotechnologies/Microelectronics

Complete list of metadatas

http://hal.in2p3.fr/in2p3-01292733
Contributor : Emmanuelle Vernay <>
Submitted on : Wednesday, March 23, 2016 - 4:25:28 PM
Last modification on : Tuesday, May 22, 2018 - 9:48:10 PM

Design of low power 12bit 40MSPS SAR ADCs with a redundancy algorithm and digital calibration for high dynamic range calorimeter readout

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Design of low power 12bit 40MSPS SAR ADCs with a redundancy algorithm and digital calibration for high dynamic range calorimeter readout

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