Area-efficient readout with 14-bit SAR-ADC for CMOS image sensors

Abstract : This paper proposes a readout design for CMOS image sensors. It has been squeezed into a 7.5um pitch under a 0.28um 1P3M technology. The ADC performs one 14-bit conversion in only 1.5us and targets a theoretical DNL feature about +1.3/-1 at 14-bit accuracy. Correlated Double Sampling (CDS) is performed both in the analog and digital domains to preserve the image quality.
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Submitted on : Monday, July 18, 2016 - 1:24:08 PM
Last modification on : Tuesday, May 22, 2018 - 9:48:11 PM

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S. Ben Aziza, D. Dzahini. Area-efficient readout with 14-bit SAR-ADC for CMOS image sensors . 20th International Conference on Circuits, Systems, Communications and Computers (CSCC 2016), Jul 2016, Corfu Island, Greece. pp.01006, ⟨10.1051/matecconf/20167601006 ⟩. ⟨in2p3-01346120⟩

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