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Conference papers
Pixel architectures in a HV-CMOS process for the ATLAS inner detector upgrade
Y. Degerli
1
S. Godiot
2
F. Guilloux
1
T. Hemperek
3
H. Krüger
3
M. Lachkar
1
J. Liu
2
F. Orsini
1
P. Pangaud
2
P. Rymaszewski
3
T. Wang
3
1
IRFU - Institut de Recherches sur les lois Fondamentales de l'Univers (CEA Saclay
F-91191 Gif sur Yvette cedex - France)
- CEA - Commissariat à l'énergie atomique et aux énergies alternatives : DRF/IRFU (Centre de Saclay Centre de Grenoble Centre de Cadarache etc - France)
- Université Paris-Saclay (Espace Technologique, Bat. Discovery - RD 128 - 2e ét., 91190 Saint-Aubin - France)
2
CPPM - Centre de Physique des Particules de Marseille (163, avenue de Luminy - Case 902 - 13288 Marseille cedex 09 - France)
- AMU - Aix Marseille Université : UMR7346 / UMR6550 / UMR6450 / URA6450 (Aix-Marseille Université Jardins du Pharo 58 Boulevard Charles Livon 13284 Marseille cedex 7 - France)
- IN2P3 - Institut National de Physique Nucléaire et de Physique des Particules du CNRS (France)
- CNRS - Centre National de la Recherche Scientifique : UMR7346 / UMR6550 / UMR6450 / URA6450 (France)
3
Physikalisches Institut [Bonn] (Nussallee 12, 53115 Bonn - Germany)
- Rheinische Friedrich-Wilhelms-Universität Bonn (Regina-Pacis-Weg 3, 53113 Bonn - Germany)
Abstract : In this paper, design details and simulation results of new pixel architectures designed in LFoundry 150 nm high voltage CMOS process in the framework of the ATLAS high luminosity inner detector upgrade are presented. These pixels can be connected to the FE-I4 readout chip via bump bonding or glue and some of them can also be tested without a readout chip. Negative high voltage is applied to the high resistivity (> 2 kΩ .cm) substrate in order to deplete the deep n-well charge collection diode, ensuring good charge collection and radiation tolerance. In these pixels, the front-end has been implemented inside the diode using both NMOS and PMOS transistors. The pixel pitch is 50 μm × 250 μm for all pixels. These pixels have been implemented in a demonstrator chip called LFCPIX.
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Conference papers
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http://hal.in2p3.fr/in2p3-01467357
Contributor : Danielle Cristofol Connect in order to contact the contributor
Submitted on : Tuesday, February 14, 2017 - 1:27:09 PM
Last modification on : Tuesday, March 30, 2021 - 3:18:18 AM
Contributor : Danielle Cristofol Connect in order to contact the contributor
Submitted on : Tuesday, February 14, 2017 - 1:27:09 PM
Last modification on : Tuesday, March 30, 2021 - 3:18:18 AM
Identifiers
- HAL Id : in2p3-01467357, version 1
- DOI : 10.1088/1748-0221/11/12/C12064
Citation
Y. Degerli, S. Godiot, F. Guilloux, T. Hemperek, H. Krüger, et al.. Pixel architectures in a HV-CMOS process for the ATLAS inner detector upgrade. Topical Workshop on Electronics for Particle Physics (TWEPP2016), Sep 2016, Karlsruhe, Germany. pp.C12064, ⟨10.1088/1748-0221/11/12/C12064⟩. ⟨in2p3-01467357⟩
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