Design of low power and low area 12-bit 40MSPS SAR ADCs with a redundancy algorithm and digital calibration for high dynamic range calorimeter readout

Abstract : We present two versions of 12-bit 40MSPS SAR ADCs using a search algorithm so called generalized redundant. It offers the flexibility to relax the requirements on the DAC settling time. Two more bits of redundancy are included to allow a digital calibration based on a code density analysis to compensate the capacitors mismatching effects. A monotonic switching algorithm is used for these prototypes; hence 70% of dynamic power consumption is saved in comparison to a conventional switching algorithm. Our first prototype used a non segmented conservative scheme. The second prototype is segmented and offered a very aggressively low area feature. Both design are fully differential and was produced in a CMOS 130nm 1P8M process. The first design dissipates 11mW with an area of 7mm2, while the second dissipate only 6.5mW for an area of only 0.35mm2 and open the way for multichannel and multi-gain integrated readout circuits including high resolution converters.