| HAL : hal-00608608, version 1 |
| Fiche détaillée | Récupérer au format |
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| 9th IEEE NEWCAS (2011), BORDEAUX : France (2011) |
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| An 8Gsps, 65nm CMOS Wideband Track-and-Hold |
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| Diego Rossoni Mattos1P. Hellmuth2Cyril Recoquillon3, 4, 5, 6S. Gauffre3, 4, 5, 6Ph. Cais3, 4, 5, 6J.L. Pedroza2Jean-Baptiste Begueret1Alain Baudry3, 4, 5, 6, 7 |
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| (26/06/2011) |
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| A track-and-hold (T&H) circuit has been designed and fabricated using the 65nm CMOS technology from STMicroelectronics. A fully differential architecture has been adopted. The circuit exhibits a -3dB input bandwidth wider than 8GHz. At 8GHz, the maximum sampling frequency, the measured overall power consumption and gain are 178mW and 0dB, respectively. The T&H core dissipates around 40mW. The measured total harmonic distortion (THD) at Nyquist sampling conditions is about -37dB. The circuit die area is 1.1mm². |
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| ELEC |
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| Domaine | : | Sciences de l'ingénieur/Electronique |
| hal-00608608, version 1 | |
| http://hal.archives-ouvertes.fr/hal-00608608 | |
| oai:hal.archives-ouvertes.fr:hal-00608608 | |
| Contributeur : Equipe Conception De Circuits | |
| Soumis le : Mercredi 13 Juillet 2011, 15:13:54 | |
| Dernière modification le : Lundi 7 Mai 2012, 16:13:50 | |