| HAL : hal-00656796, version 1 |
| Fiche détaillée | Récupérer au format |
|
|
| ICECS, BEYROUTH : Liban (2011) |
|
|
|
|
| Design of an 8GSps, 65nm CMOS Wideband Flash Analog-to-Digital Converter |
|
|
| Diego Rossoni Mattos1S. Gauffre2, 3, 4, 5P. Hellmuth6Ph. Cais2, 3, 4, 5J.L. Pedroza6Jean-Baptiste Begueret1Alain Baudry2, 3, 4, 5, 7 |
|
|
| (11/12/2011) |
|
|
| This paper describes the design of an 8Gsps flash Analog-to-Digital Converter (ADC) for wideband radio astronomy applications. The ADC contains a track-and-hold (TAH) and a 1-to-4 demultiplexer. Our circuit has been fabricated with the 65nm technology from STMicroelectronics. The post-layout simulations show a Figure of Merit (FoM) of 11.36pJ/conv.step and a power consumption of 480mW at Nyquist sampling condition. The ongoing tests will soon verify these predictions |
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
|
| ELEC fORMATION STELLAIRE 2011 |
|
|
|
|
| Domaine | : | Sciences de l'ingénieur/Electronique |
| hal-00656796, version 1 | |
| http://hal.archives-ouvertes.fr/hal-00656796 | |
| oai:hal.archives-ouvertes.fr:hal-00656796 | |
| Contributeur : Equipe Conception De Circuits | |
| Soumis le : Jeudi 5 Janvier 2012, 10:40:30 | |
| Dernière modification le : Lundi 7 Mai 2012, 16:10:13 | |