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Optimizing latency in Xilinx FPGA implementations of the GBT/Erratum: optimizing latency in Xilinx FPGA implementations of the GBT Muschter S., Baron S., Bohm C., -P. Cachemiche J., Soos C. Dans Journal of Instrumentation - Topical Workshop on Electronics for Particle Physics 2010 (TWEPP-10), Allemagne (2010) [in2p3-00595097 - version 1]