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Topical Workshop on Electronics for Particle Physics 2010, TWEPP 2010, Aachen : Allemagne (2010)
Subnano time to digital converter implemented in PARISROC for PMm2 R&D program
S. Conforti Di Lorenzo1, S. Drouet1, F. Dulucq1, A. El Berni1, C. de La Taille1, G. Martin-Chassard1, E. Wanlin2, B. Yun Ky2
PMm2 Collaboration(s)

PARISROC is a complete read out chip, in a BiCMOS SiGe 0.35μm technology from AustriaMicroSystems, for photomultipliers array. It allows triggerless acquisition for next generation neutrino experiments and is part of a R&D program called PMm2. The ASIC integrates 16 independent and auto triggered channels with variable gain and provides charge and time measurement by a 10-bit Wilkinson ADC and a 24-bit counter. The time measurement is made of 2 complementary systems: a 24-bit gray counter (coarse time) with a step of 100 ns, and a double ramp TDC (fine time) with a 10-bit resolution and a measured precision of 425 ps RMS. Only the analog TDC will be explained in this paper by detailing the double ramp TDC architecture, the special cares and the first fine time measurements. One of the fine time TDC characteristics is the fact that the double ramp generator is common to all channels.
1 :  LAL - Laboratoire de l'Accélérateur Linéaire
2 :  IPNO - Institut de Physique Nucléaire d'Orsay
Sciences de l'ingénieur/Micro et nanotechnologies/Microélectronique

Physique/Physique/Instrumentations et Détecteurs
VLSI circuits – Analogue electronic circuits – Front-end electronics for detector readout