Hybrid pixels detectors featuring high spatial resolution, very good signal to noise ratio and radiation hardness are currently used as vertex detectors in High Energy Physic experiments. Facing the future challenges of ATLAS/SLHC hybrid pixel vertex detectors is foreseen to be done by microelectronic technology shrinking but also by emerging 3-D technologies. This talk will present the design of a 3-D chip made in Tezzaron-Chartered as well as the design and test of read-out chip demonstrators already built in the 0.13μm Chartered technology